# Student 0.4 x 2 = 0.8 with first digit

Student Name: Kevin Matthew De Rozario

Date Submitted: 15th January 2018

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Degree Title: Computing and Information Systems

Local Institution: Singapore Institute of Management

Student ID: 170280334

Question 1

(a)   Step
1: Determine the sign of the decimal number.

Since
17.45 is a positive number, sign bit will be 0.

Step
2: Convert 17.45 into binary by breaking it down into 17 and 0.45.

To
convert 17 into binary:

17/2
= 8 with remainder 1

8/2
= 4 with remainder 0

4/2
= 2 with remainder 0

2/2
= 1 with remainder 0

1/2
= 0 with remainder 1

17 converted to binary is equal to 10001. (derived
from the remainder backwards)

To
convert 0.45 into binary:

0.45
x 2 = 0.9 with first digit 0

0.9
x 2 = 1.8 with first digit 1

0.8 x 2 = 1.6 with first
digit 1

0.6 x 2 = 1.2 with first
digit 1

0.2 x 2 = 0.4 with first
digit 0

0.4 x 2 = 0.8 with first
digit 0

The
highlight steps is recurring as the next step will be 0.8 x 2 = 1.6 with first digit 1 again.

0.45 converted to binary is equal to 01 1100 1100 1100
… (derived from the first digits forwards)

Hence
17.45 converted to binary is equal to 10001.01110011001100…

Step 3: Write binary number in scientific notation.

10001.01110011001100…
= 1.000101110011001100… x 24

Step 4: Find biased exponent in binary.

As
seen in step 3, 4 is the exponent.

Since
4 is positive, add 127 to 4 which equals to 131.

To
convert 131 to binary:

131/2=
65 with remainder 1

65/2
= 32 with remainder 1

32/2
= 16 with remainder 0

16/2
= 8 with remainder 0

8/2
= 4 with remainder 0

4/2
= 2 with remainder 0

2/2
= 1 with remainder 0

1/2
= 0 with remainder 1

131
converted to binary is equal to 10000011

Step 5: Put together the sign, exponent and fraction
to get the IEEE 754 Form.

The
Sign has 1 bit.

The
Exponent has 8 bits.

The
Fraction has 23 bits.

Sign

Exponent

Fraction

Decimal

0

131

17.45

Binary

0

10000011

00010111001100110011001

17.45
converted to IEEE 754 single precision representation will the final answer of

01000001100010111001100110011001.

(b)  In order to convert the 0.25 of 1.25 to binary, we
need to multiply it by 2. (similar to the step 2 of question 1 part a)

0.25
x 2 = 0.5 (with first digit 0)

0.5
x 2 = 1.0 (with first digit 1)

0 x 2 = 0 (first digit of previous step is omitted which gives
zero multiplied by 2 here)

0 x 2 = 0 (This step recurs)

(continues)

Since
the step of 0x2=0 recurs, the mantissa for the 0.25 part of 1.25 will only give
1 bit of value 1 with the other bits all being 0s. Hence, the mantissa of 1.25
in IEEE 754 single precision will give a lot of recurring zeroes to until the
number of stored bits are met.

On
the other hand to convert 0.26 of 1.26 to binary, we also multiply it by 2.

0.26
x 2 = 0.52

0.52
x 2 = 1.04

0.04
x 2 = 0.08

0.08
x 2 = 0.16

0.16
x 2 = 0.32

0.32
x 2 = 0.64

0.64
x 2 = 1.28

0.28
x 2 = 0.56

0.56
x 2 = 1.12

0.12
x 2 = 0.24

0.24
x 2 = 0.48

0.48
x 2 = 0.96

(Continues until recurring steps are met.)

From
the workings here we can already tell that the mantissa for the 0.26 part of
1.26 has already at least three bits with value 1, which is more than that of
the 0.25 part of 1.25. And the workings would continue to give even more bits
with value 1. Hence, there are many more 1’s in the mantissa of IEEE 754
representation of 1.26 than 1.25.

(c)   In IEEE 754 floating point numbers, the exponent is
biased as exponents need to be signed values so that they can take the form of
both small and large values. Two’s complement, which is the most common form of
signed values, creates too much complications in comparing exponent values.
Hence, exponent is kept as an unsigned value that is easy to compare and when
being used it is transformed into an exponent in the signed range by deducting
its bias.

Question 2

(a)   Disk rotation speed = 12000 rpm = 12000/60 revolutions
per second

= 200 revolutions per second

Time
taken for one revolution = 1/200s = 0.005s = 5ms

Average rotational delay = 5ms/2 = 2.5ms

For
the first track:

Total
time to access and read data = average seek time + average rotational delay +

time
taken to read one track

= 6ms + 2.5ms + 5ms

= 13.5ms

For
the second to sixth track:

Since files are store in adjacent tracks, the
remaining tracks can now be read with essentially no seek time as the I/O
operation keep up with the flow from the disk.

Total
time to access and read data = 5 * (average rotational delay + time taken to
read

one
track)

= 5 * (2.5ms + 5ms)

= 37.5ms

For
the last track:

Total
time to access and read data = average rotational delay + time taken to read
half

a
track

= 2.5ms + (5ms/2)

= 5ms

For
all the tracks with data stored:

Total time to access and read
data stored in the 6 and a half tracks

=13.5ms
+ 37.5ms + 5ms

=
56ms

(b)  Disk rotation speed = 12000 rpm = 12000/60 revolutions
per second

= 200 revolutions per second

Time taken for one revolution = 1/200s = 0.005s = 5ms

Time taken to read 500 sectors = 5ms

Time taken to read 1 sector = 5ms/500 =  0.01ms

For one sector:

Time taken to access and read data = average seek time
+ average rotational delay

+
time taken to read one sector

=6ms
+ 2.5ms + 0.01ms

=8.51ms

Total time
taken to access and read data in all sectors with stored data

= (6.5 * 500) sectors x 8.51ms

= 27657.5ms

(c)
(56/27657.5) x 100
= 0.002024(4.sf)

0.2%
(1s.f)

Question 3

(a)
Locality of
Reference is the occurrence of a similar data or associated storage addresses
being used multiple times in a short period of time. This occurrence has two
types of instances – Temporal and Spatial.

Temporal Locality relates to the reuse of certain
information or resources in the span of short time durations. Spatial Locality
relates to the usage of data in comparably near storage locations.
(Codingfreak, 2009)

(Discuss how it is exploited by cache memory.)

(b)   Block size = 16kb

2^w = 16kb

2^w = 16 x 1024 bytes/words

2^w = 2^4 x 2^10 bytes/words

2^w = 2^14 bytes/words

w = 14 bit

Physical address size = Tag size(s-r) + Lines of
blocks(r) + Words(w)

33 bits = 11 bits + r + 14 bits

r = 8 bits

Number of lines(blocks) in cache, m

= 2^r

= 2^8

= 256 lines

Question 4

(a)

Diagram 4.a.1(Levy,2005)

Assuming that the pipeline is not able to read and
write in the same cycle, from Diagram
4.a.1, it illustrates that data hazards is the dependency of an instruction
on the previous instruction. This is because the Instruction Decoding(ID) step
needs the result that is obtained from the Write Back(WB) in the previous
relevant step. If the WB of the relevant instruction has not occurred yet, the
current instruction will stall until that WB is completed before it can carry
out its ID. The stall is also called a pipeline bubble, which is evident in
Diagram 4.a.2 as well.

Time units à

ß Sequence of
instructions

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

1

IF

ID

EX

MEM

WB

2

IF

ID

EX

MEM

WB

3

IF

STALL

ID

EX

MEM

WB

4

IF

ID

EX

MEM

WB

5

IF

STALL

ID

EX

MEM

WB

Diagram 4.a.2

(b)  From diagram
4.a.2, it takes 15 time units for the instruction sequence to complete.

(c)

Time units à

ß Sequence of
instructions

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

1

IF

ID

EX

MEM

WB

4

IF

STALL

ID

EX

MEM

WB

2

IF

ID

EX

MEM

WB

5

IF

STALL

ID

EX

MEM

WB

3

IF

ID

EX

MEM

WB

Diagram
4c

Diagram 4c shows
all the instruction cycles being completed thus giving the same result as in
diagram 4a, with the difference of time units needed to complete all the
instructions. The instructions sequence in part(4c) requires only 14 time units
which is one time unit faster than that in part(4a) due to a reduction in the
stalls, thus making the instruction sequence in part(4c) more efficient.

Reference Page:

Arun Somani (2005) Example: Converting to IEEE 754
Form. Retrieved from http://class.ece.iastate.edu/arun/CprE281_F05/ieee754/ie4.html

Codingfreak (2009, March 18). Principle of Locality
Blog Post. Retrieved from

http://codingfreak.blogspot.com/2009/03/principle-of-locality.html

Levy, 2005. Computer Systems: Pipelining. Retrieved
from http://www.cs.washington.edu/410

Stallings,
W. “Computer Organization and Architecture, Designing for Performance (10th
Edition)”. pp. 225-227

Stallings,
W. “Computer Organization and Architecture, Designing for Performance (10th
Edition)”. pp. 378-382